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  1 amp/1.5 amp/2 am p synchronous, step-down dc-to-dc converters adp2105/adp2106/adp2107 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006C2008 analog devices, inc. all rights reserved. features extremely high 97% efficiency ultralow quiescent current: 20 a 1.2 mhz switching frequency 0.1 a shutdown supply current maximum load current adp2105: 1 a adp2106: 1.5 a adp2107: 2 a input voltage: 2.7 v to 5.5 v output voltage: 0.8 v to v in maximum duty cycle: 100% smoothly transitions into low dropout (ldo) mode internal synchronous rectifier small 16-lead 4 mm 4 mm lfcsp_vq package optimized for small ceramic output capacitors enable/shutdown logic input undervoltage lockout soft start applications mobile handsets pdas and palmtop computers telecommunication/networking equipment set top boxes audio/video consumer electronics general description the adp2105/adp2106/adp2107 are low quiescent current, synchronous, step-down dc-to-dc converters in a compact 4 mm 4 mm lfcsp_vq package. at medium to high load currents, these devices use a current mode, constant frequency pulse- width modulation (pwm) control scheme for excellent stability and transient response. to ensure the longest battery life in portable applications, the adp2105/adp2106/adp2107 use a pulse frequency modulation (pfm) control scheme under light load conditions that reduces switching frequency to save power. the adp2105/adp2106/adp2107 run from input voltages of 2.7 v to 5.5 v, allowing single li+/li? polymer cell, multiple alkaline/nimh cells, pcmcia, and other standard power sources. the output voltage of adp2105/adp2106/adp2107 is adjustable from 0.8 v to the input voltage (indicated by adj), whereas the adp2105/adp2106/adp2107 are available in preset output voltage options of 3.3 v, 1.8 v, 1.5 v, and 1.2 v (indicated by x.x v). each of these variations is available in three maximum current levels: 1 a (adp2105), 1.5 a (adp2106), and 2 a (adp2107). the power switch and synchronous rectifier are integrated for minimal external part count and high efficiency. during logic controlled shutdown, the input is disconnected from the output, and it draws less than 0.1 a from the input source. other key features include undervoltage lockout to prevent deep battery discharge and programmable soft start to limit inrush current at startup. typical operating circuit adp2107-adj off en ss lx2 fb pwin1 agnd output voltage = 2.5v comp on pgnd in gnd gnd gnd nc gnd lx1 pwin2 v in v in input voltage = 2.7v to 5.5v 10 f fb 1nf 70k? 120pf 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 2 h 4.7 f load 0a to 2a 10 f 10 f 10? 0.1 f nc = no connect 06079-002 85k? 40k? fb figure 1. circuit configur ation of adp2107 with v out = 2.5 v 100 75 02 06079-001 load current (ma) efficiency (%) 0 0 0 95 90 85 80 200 400 600 800 1000 1200 1400 1600 1800 v in = 3.3v v in = 3.6v v in = 5v v out = 2.5v figure 2. efficiency vs. load current for the adp2107 with v out = 2.5 v
adp2105/adp2106/adp2107 rev. c | page 2 of 36 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 typical operating circuit ................................................................ 1 revision history ............................................................................... 2 functional block diagram .............................................................. 3 specifications ..................................................................................... 4 absolute maximum ratings ............................................................ 6 thermal resistance ...................................................................... 6 boundary condition .................................................................... 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 theory of operation ...................................................................... 14 control scheme .......................................................................... 14 pwm mode operation .............................................................. 14 pfm mode operation ................................................................ 14 pulse-skipping threshold ......................................................... 14 100% duty cycle operation (ldo mode) ............................. 14 slope compensation .................................................................. 15 design features ........................................................................... 15 applications information .............................................................. 16 external component selection ................................................ 16 setting the output voltage ........................................................ 16 inductor selection ...................................................................... 17 output capacitor selection ....................................................... 18 input capacitor selection .......................................................... 18 input filter ................................................................................... 19 soft start period .......................................................................... 19 loop compensation .................................................................. 19 bode plots .................................................................................... 20 load transient response .......................................................... 21 efficiency considerations ......................................................... 22 thermal considerations ............................................................ 22 design example .............................................................................. 24 external component recommendations .................................... 25 circuit board layout recommendations ................................... 27 evaluation board ............................................................................ 28 evaluation board schematic for adp2107 (1.8 v) ............... 28 recommended pcb board layout (evaluation board layout) ....................................................................................................... 28 application circuits ....................................................................... 30 outline dimensions ....................................................................... 33 ordering guide .......................................................................... 33 revision history 9/08rev. b to rev. c changes to table summary statement .......................................... 4 changes to lx minimum on-time parameter, table 1 ............. 5 7/08rev. a to rev. b changes to general description section ...................................... 1 changes to figure 3 .......................................................................... 3 changes to table 1 ............................................................................ 4 changes to table 2 ............................................................................ 6 changes to figure 4 .......................................................................... 7 changes to table 4 ............................................................................ 7 changes to figure 26 ...................................................................... 11 changes to figure 31 through figure 34 .................................... 12 changes to figure 35 ...................................................................... 13 changes to pmw mode operation section and pulse skipping threshold section ........................................................................... 14 changes to slope compensation section .................................... 15 changes to setting the output voltage section ........................ 16 changes to figure 37 ...................................................................... 16 changes to inductor selection section ........................................ 17 changes to input capacitor selection section ........................... 18 changes to figure 47 through figure 52 ..................................... 21 changes to transition losses section and thermal considerations section .................................................................. 22 changes to table 11 ....................................................................... 25 changes to circuit board layout recommendations section..27 changes to table 12 ....................................................................... 26 changes to figure 53 ...................................................................... 28 changes to figure 56 through figure 57.................................... 30 changes to figure 58 through figure 59.................................... 31 changes to outline dimensions .................................................. 33 3/07rev. 0 to rev. a updated format .................................................................. universal changes to output characteristics and lx (switch node) characteristics sections ................................... 3 changes to typical performance characteristics section ........... 7 changes to load transient response section ............................ 21 7/06revision 0: initial version
adp2105/adp2106/adp2107 rev. c | page 3 of 36 functional block diagram 14 13 9 in pwin1 pwin2 12 10 lx2 11 pgnd lx1 2 gnd 7 agnd 16 fb 16 fb 6 ss 5 comp 3 gnd 4 gnd 8 nc 15 gnd 1 en soft start reference 0.8v gm error amp for preset voltage options only pwm/ pfm control current limit zero cross comparator thermal shutdown current sense amplifier driver and anti- shoot through slope compensation oscillator 06079-037 figure 3.
adp2105/adp2106/adp2107 rev. c | page 4 of 36 specifications v in = 3.6 v @ t a = 25c, unless otherwise noted. 1 table 1. parameter min typ max unit conditions input characteristics input voltage range 2.7 5.5 v ?40c t j +125c undervoltage lockout threshold 2.4 v v in rising 2.2 2.6 v v in rising, ?40c t j +125c 2.2 v v in falling 2.0 2.5 v v in falling, ?40c t j +125c undervoltage lockout hysteresis 2 200 mv v in falling output characteristics output regulation voltage 3.267 3.3 3.333 v 3.3 v, load = 10 ma 3.3 v 3.3 v, v in = 3.6 v to 5.5 v, no load to full load 3.201 3.399 v 3.3 v, v in = 3.6 v to 5.5 v, no load to full load, ?40c t j +125c 1.782 1.8 1.818 v 1.8 v, load = 10 ma 1.8 v 1.8 v, v in = 2.7 v to 5.5 v, no load to full load 1.746 1.854 v 1.8 v, v in = 2.7 v to 5.5 v, no load to full load, ?40c t j +125c 1.485 1.5 1.515 v 1.5, load = 10 ma 1.5 v adp210x-1.5 v, v in = 2.7 v to 5.5 v, no load to full load 1.455 1.545 v adp210x-1.5 v, v in = 2.7 v to 5.5 v, no load to full load, ?40c t j +125c 1.188 1.2 1.212 v 1.2 v, load = 10 ma 1.2 v 1.2 v, v in = 2.7 v to 5.5 v, no load to full load 1.164 1.236 v 1.2 v, v in = 2.7 v to 5.5 v, no load to full load, ?40c t j +125c load regulation 0.4 %/a adp2105 0.5 %/a adp2106 0.6 %/a adp2107 line regulation 3 0.1 0.33 %/v adp2105, measured in servo loop 0.1 0.3 %/v adp2106 and adp2107, measured in servo loop output voltage range 0.8 v in v adj feedback characteristics fb regulation voltage 0.8 v adj 0.784 0.816 v adj, ?40c t j +125c fb bias current ?0.1 +0.1 a adj, ?40c t j +125c 3 a 1.2 v output voltage 6 a 1.2 v output voltage, ?40c t j +125c 4 a 1.5 v output voltage 8 a 1.5 v output voltage, ?40c t j +125c 5 a 1.8 v output voltage 10 a 1.8 v output voltage, ?40c t j +125c 10 a 3.3 v output voltage 20 a 3.3 v output voltage, ?40c t j +125c
adp2105/adp2106/adp2107 rev. c | page 5 of 36 parameter min typ max unit conditions input current characteristics in operating current 20 a adp210x(adj), v fb = 0.9 v 30 a adp210x(adj), v fb = 0.9 v, ?40c t j +125c 20 a adp210x(x.x v) output voltage 10% above regulation voltage 30 a adp210x(x.x v) output voltage 10% above regulation voltage, ?40c t j +125c in shutdown current 4 0.1 1 a v en = 0 v lx (switch) node characteristics lx on resistance 4 190 m p-channel switch, adp2105 270 m p-channel switch, adp2105, ?40c t j +125c 100 m p-channel switch, adp2106 and adp2107 165 m p-channel switch, adp2106 and adp2107, ?40c t j +125c 160 m n-channel synchr onous rectifier, adp2105 230 m n-channel synchronous rectifier, adp2105, ?40c t j +125c 90 m n-channel synchronou s rectifier, adp2106 and adp2107 140 m n-channel synchronous rect ifier, adp2106 and adp2107, ?40c t j +125c lx leakage current 4 , 5 0.1 1 a v in = 5.5 v, v lx = 0 v, 5.5 v lx peak current limit 5 2.9 a p-channel switch, adp2107 2.6 3.3 a p-channel switch, adp2107, ?40c t j +125c 2.25 a p-channel switch, adp2106 2.0 2.6 a p-channel switch, adp2106, ?40c t j +125c 1.5 a p-channel switch, adp2105 1.3 1.8 a p-channel switch, adp2105, ?40c t j +125c lx minimum on-time 110 ns in pwm mode of operation, ?40c t j +125c enable characteristics en input high voltage 2 v v in = 2.7 v to 5.5 v, ?40c t j +125c en input low voltage 0.4 v v in = 2.7 v to 5.5 v, ?40c t j +125c en input leakage current ?0.1 a v in = 5.5 v, v en = 0 v, 5.5 v ?1 +1 a v in = 5.5 v, v en = 0 v, 5.5 v, ?40c t j +125c oscillator frequency 1.2 mhz v in = 2.7 v to 5.5 v 1 1.4 mhz v in = 2.7 v to 5.5 v, ?40c t j +125c soft start period 750 1000 1200 s c ss = 1 nf thermal characteristics thermal shutdown threshold 140 c thermal shutdown hysteresis 40 c compensator transconductance (g m ) 50 a/v current sense amplifier gain (g cs ) 2 1.875 a/v adp2105 2.8125 a/v adp2106 3.625 a/v adp2107 1 all limits at temperature extremes are gua ranteed via correlation using standard stat istical quality control (sqc). typical va lues are at t a = 25c. 2 guaranteed by design. 3 the adp2105/adp2106/adp2107 line re gulation was measured in a serv o loop on the automated test equipment that adjusts the feed back voltage to achieve a specific comp voltage. 4 all lx (switch) node characteristics are guaranteed only when the lx1 pin and lx2 pin are tied together. 5 these specifications are guaranteed from ?40c to +85c.
adp2105/adp2106/adp2107 rev. c | page 6 of 36 absolute maximum ratings table 2. parameter rating in, en, ss, comp, fb to agnd ?0.3 v to +6 v lx1, lx2 to pgnd ?0.3 v to (v in + 0.3 v) pwin1, pwin2 to pgnd ?0.3 v to +6 v pgnd to agnd ?0.3 v to +0.3 v gnd to agnd ?0.3 v to +0.3 v pwin1, pwin2 to in ?0.3 v to +0.3 v operating junction temperature range ?40c to +125c storage temperature range ?65c to +150c soldering conditions jedec j-std-020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja unit 16-lead lfcsp_vq/qfn 40 c/w maximum power dissipation 1 w boundary condition natural convection, 4-layer board, exposed pad soldered to the pcb. esd caution
adp2105/adp2106/adp2107 rev. c | page 7 of 36 pin configuration and fu nction descriptions pin 1 indicator nc = no connect 11 pgnd 12 lx2 10 lx1 9 pwin2 c o m p 5 s s 6 a g n d 7 n c 8 adp2105/ adp2106/ adp2107 top view (not to scale) 15 gnd 16 fb 14 in 13 pwin1 e n 1 g n d 2 g n d 3 g n d 4 06079-003 figure 4. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 en enable input. drive en high to turn on the device. dr ive en low to turn off the device and reduce the input current to 0.1 a. 2, 3, 4, 15 gnd test pins. these pins are used for internal testing and are not ground return pins. these pins are to be tied to the agnd plane as close as possible to the adp2105/adp2106/adp2107. 5 comp feedback loop compensation node. comp is the output of the internal transconductance error amplifier. place a series rc network from comp to agnd to compensate the converter. see the loop compensation section. 6 ss soft start input. place a capacitor from ss to agnd to set the soft start period. a 1 nf capacitor sets a 1 ms soft start period. 7 agnd analog ground. connect the ground of the compensation components, the soft start capacitor, and the voltage divider on the fb pin to the agnd pin as close as possible to the adp2105/ adp2106/adp2107. the agnd is also to be connected to the ex posed pad of adp2105/adp2106/adp2107. 8 nc no connect. this is not internally connected and can be connected to other pins or left unconnected. 9, 13 pwin2, pwin1 power source inputs. the source of the pfet high-side switch. bypass each pwin pin to the nearest pgnd plane with a 4.7 f or greater capacitor as close as possible to the adp2105/adp2106/ adp2107. see the input capacitor selection section. 10, 12 lx1, lx2 switch outputs. the drain of the p-channel power switch and n-channel synchronous rectifier. these pins are to be tied together and connected to the output lc filter between lx and the output voltage. 11 pgnd power ground. connect the ground return of all input and output capacitors to the pgnd pin using a power ground plane as close as possible to the adp2105/adp2106/adp2107. the pgnd is then to be connected to the exposed pad of the adp2105/adp2106/adp2107. 14 in power input. the power source for the adp2105/adp 2106/adp2107 internal circuitry. connect in and pwin1 with a 10 resistor as close as possible to the adp2105/ adp2106/adp2107. bypass in to agnd with a 0.1 f or greater capacitor. see the input filter section. 16 fb output voltage sense or feedback input. for fixed output versions, connect to the output voltage. for adjustable versions, fb is the input to the error amplifie r. drive fb through a resistive voltage divider to set the output voltage. the fb regulation voltage is 0.8 v.
adp2105/adp2106/adp2107 rev. c | page 8 of 36 typical performance characteristics 100 11 06079-084 load current (ma) efficiency (%) 0 0 0 10 100 95 90 85 80 75 70 65 60 v in = 5.5v v in = 4.2v v in = 3.6v v in = 2.7v inductor: sd14, 2.5h dcr: 60m ? t a = 25c figure 5. efficiencyadp2105 (1.2 v output) 100 1 1000 06079-085 load current (ma) efficiency (%) 10 100 95 90 85 80 75 70 65 60 v in = 3.6v v in = 4.2v v in = 5.5v inductor: cdrh5d18, 4.1 h dcr: 43m ? t a = 25c figure 6. efficiencyadp2105 (3.3 v output) 100 50 1 10k 06079-062 load current (ma) efficiency (%) 95 90 85 80 75 70 65 60 55 10 100 1k v in = 2.7v v in = 3.6v v in = 4.2v v in = 5.5v inductor: d62lcb, 2h dcr: 28m ? t a = 25c figure 7. efficiencyadp2106 (1.8 v output) 100 1 1000 06079-086 load current (ma) efficiency (%) 10 100 95 90 85 80 75 70 65 v in = 4.2v inductor: sd3814, 3.3h dcr: 93m ? t a = 25c v in = 2.7v v in = 3.6v v in = 5.5v figure 8. efficiencyadp2105 (1.8 v output) 100 50 1 10k 06079-008 load current (ma) efficiency (%) 95 90 85 80 75 70 65 60 55 10 100 1k v in = 5.5v v in = 4.2v v in = 3.6v v in = 2.7v inductor: d62lcb, 2h dcr: 28m ? t a = 25c figure 9. efficiencyadp2106 (1.2 v output) 100 50 1 10k 06079-053 load current (ma) efficiency (%) 95 90 85 80 75 70 65 60 55 10 100 1k v in = 4.2v v in = 5.5v v in = 3.6v inductor: d62lcb, 3.3h dcr: 47m ? t a = 25c figure 10. efficiencyadp2106 (3.3 v output)
adp2105/adp2106/adp2107 rev. c | page 9 of 36 100 50 1 10k 06079-010 load current (ma) efficiency (%) 95 90 85 80 75 70 65 60 55 10 100 1k v in = 4.2v v in = 5.5v v in = 3.6v v in = 2.7v inductor: sd12, 1.2h dcr: 37m ? t a = 25c figure 11. efficiencyadp2107 (1.2 v) 100 50 1 10k 06079-054 load current (ma) efficiency (%) 95 90 85 80 75 70 65 60 55 10 100 1k v in = 4.2v v in = 5.5v v in = 3.6v inductor: cdrh5d28, 2.5h dcr: 13m ? t a = 25c figure 12. efficiencyadp2107 (3.3 v) 1.85 1.75 0.1 10k 06079-064 load current (ma) output voltage (v) 5.5v, ?40c 5.5v, +25c 2.7v, ?40c 2.7v, +25c 2.7v, +125c 3.6v, ?40c 3.6v, +25c 3.6v, +125c 5.5v, +125c 1.83 1.81 1.79 1.77 1 10 100 1k figure 13. output voltage accuracyadp2107 (1.8 v) 100 50 1 10k 06079-063 load current (ma) efficiency (%) 95 90 85 80 75 70 65 60 55 10 100 1k v in = 2.7v v in = 3.6v v in = 4.2v v in = 5.5v inductor: d62lcb, 1.5h dcr: 21m ? t a = 25c figure 14. efficiencyadp2107 (1.8 v) 1.23 1.17 0.01 10k 06079-082 load current (ma) output voltage (v) 5.5v, ?40c 5.5v, +25c 2.7v, ?40c 2.7v, +25c 2.7v, +125c 3.6v, ?40c 3.6v, +25c 3.6v, +125c 5.5v, +125c 0.1 1 10 100 1k 1.22 1.21 1.20 1.19 1.18 figure 15. output voltage accuracyadp2107 (1.2 v) 3.38 3.22 0.01 10k 06079-081 load current (ma) output voltage (v) 0.1 1 10 100 1k 3.36 3.34 3.32 3.30 3.28 3.26 3.24 5.5v, ?40c 5.5v, +25c 3.6v, ?40c 3.6v, +25c 3.6v, +125c 5.5v, +125c figure 16. output voltage accuracyadp2107 (3.3 v)
adp2105/adp2106/adp2107 rev. c | page 10 of 36 10k 1 0.8 06079-016 input voltage (v) quiescent current (a) 10 100 1k 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 ?40c +125c +25c figure 17. quiescent current vs. input voltage ?40 125 06079-017 temperature (c) feedback voltage (v) ?20 0 20 40 60 80 100 120 0.795 0.796 0.797 0.798 0.799 0.800 0.801 0.802 figure 18. feedback voltage vs. temperature 1.75 1.25 06079-073 2.7 5.7 input voltage (v) peak current limit (a) 1.70 1.65 1.60 1.55 1.50 1.45 1.40 1.35 1.30 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 adp2105 (1a) t a = 25c figure 19. peak current limit of adp2105 190 180 170 160 150 140 130 120 110 100 switch on resistance (m ? ) 2.7 3.0 3.3 3.6 3.9 4.2 4.5 5.1 5.4 4.8 input voltage (v) pmos power switch nmos synchronous rectifier 06079-093 figure 20. switch on resistance vs. input voltageadp2105 120 0 2.7 5.4 06079-018 input voltage (v) switch on resistance (m ? ) 100 80 60 40 20 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 nmos synchronous rectifier pmos power switch t a = 25c figure 21. switch on resistance vs. input voltageadp2106 and adp2107 1260 1190 2.7 5.4 06079-021 input voltage (v) switching frequency (khz) 1250 1240 1230 1220 1210 1200 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 ?40c +25c +125c figure 22. switching frequency vs. input voltage
adp2105/adp2106/adp2107 rev. c | page 11 of 36 2.35 1.85 06079-072 2.7 5.7 input voltage (v) peak current limit (a) 2.30 2.25 2.20 2.15 2.10 2.05 2.00 1.95 1.90 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 adp2106 (1.5a) t a = 25c figure 23. peak current limit of adp2106 3.00 2.50 06079-071 2.7 5.7 input voltage (v) peak current limit (a) 2.95 2.90 2.85 2.80 2.75 2.70 2.65 2.60 2.55 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 adp2107 (2a) t a = 25c figure 24. peak current limit of adp2107 150 0 06079-067 2.7 5.7 input voltage (v) pulse-skipping threshold current (ma) 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 135 120 105 90 75 60 45 30 15 v out = 2.5v v out = 1.2v v out = 1.8v t a = 25c figure 25. pulse-skipping threshold vs. input voltage for adp2106 06079-074 4 3 1 lx (switch) node output voltage inductor current : 260mv @: 3.26v ch1 1v 45.8% ch4 1a ? ch3 5v m 10s a ch1 1.78v t figure 26. short -circuit response at output 135 0 2.7 5.7 06079-066 input voltage (v) pulse-skipping threshold current (ma) 120 105 90 75 60 45 30 15 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 v out = 1.8v v out = 1.2v v out = 2.5v t a = 25c figure 27. pulse-skipping threshold vs. input voltage for adp2105 195 0 06079-068 2.7 5.7 input voltage (v) pulse-skipping threshold current (ma) 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 180 165 150 135 120 105 90 75 60 45 30 15 v out = 2.5v v out = 1.8v v out = 1.2v t a = 25c figure 28. pulse-skipping threshold vs. input voltage for adp2107
adp2105/adp2106/adp2107 rev. c | page 12 of 36 190 180 170 160 150 140 130 120 110 100 switch on resistance (m ? ) 2.7 3.0 3.3 3.6 3.9 4.2 4.5 5.1 5.4 4.8 input voltage (v) pmos power switch nmos synchronous rectifier 06079-093 figure 29. switch on resistance vs. temperatureadp2105 ?40 06079-083 junction temperature (c) switch on resistance (m ? ) ?20 0 20 40 60 80 100 120 0 20 40 60 80 100 120 140 pmos power switch nmos synchronous rectifier figure 30. switch on resistance vs. temperatureadp2106 and adp2107 06079-030 ch1 50mv 6% ch4 200ma ? ch3 2v m 2s a ch3 3.88v t 3 4 1 inductor current output voltage (ac-coupled) lx (switch) node figure 31. pfm mode of operation at very light load (10 ma) 06079-033 ch1 50mv 17.4% ch4 200ma ? ch3 2v m 400ns a ch3 3.88v t 3 4 1 lx (switch) node output voltage (ac-coupled) inductor current figure 32. dcm mode of operation at light load (100 ma) 06079-034 ch1 20mv 13.4% ch4 1a ? ch3 2v m 2s a ch3 1.84v t 3 4 1 lx (switch) node output voltage (ac-coupled) inductor current figure 33. minimum off time control at dropout 06079-031 ch1 20mv 17.4% ch4 1a ? ch3 2v m 1s a ch3 3.88v t 3 4 1 output voltage (ac-coupled) inductor current lx (switch) node figure 34. pwm mode of operation at medium/heavy load (1.5 a)
adp2105/adp2106/adp2107 rev. c | page 13 of 36 06079-032 ch1 1v 45% ch4 1a ? ch3 5v m 4s a ch3 1.8v t 3 4 1 inductor current output voltage channel 3 frequency = 336.6khz : 2.86a @: 2.86a lx (switch) node figure 35. current limit behavior of adp2107 (frequency foldback) 06079-035 ch1 1v 20.2% ch4 500ma ? ch3 5v m 400s a ch1 1.84v t 3 4 1 enable voltage inductor current output voltage figure 36. startup and shutdown waveform (c ss = 1 nf ss time = 1 ms)
adp2105/adp2106/adp2107 rev. c | page 14 of 36 theory of operation the adp2105/adp2106/adp2107 are step-down, dc-to-dc converters that use a fixed frequency, peak current mode archi- tecture with an integrated high-side switch and low-side synchron- ous rectifier. the high 1.2 mhz switching frequency and tiny 16-lead, 4 mm 4 mm lfcsp_vq package allow for a small step- down dc-to-dc converter solution. the integrated high-side switch (p-channel mosfet) and synchronous rectifier (n-channel mosfet) yield high efficiency at medium to heavy loads. light load efficiency is improved by smoothly transitioning to variable frequency pfm mode. the adp2105/adp2106/adp2107 (adj) operate with an input voltage from 2.7 v to 5.5 v and regulate an output voltage down to 0.8 v. the adp2105/adp2106/adp2107 are also available with preset output voltage options of 3.3 v, 1.8 v, 1.5 v, and 1.2 v. control scheme the adp2105/adp2106/adp2107 operate with a fixed frequency, peak current mode pwm control architecture at medium to high loads for high efficiency, but shift to a variable frequency pfm control scheme at light loads for lower quiescent current. when operating in fixed frequency pwm mode, the duty cycle of the integrated switches is adjusted to regulate the output voltage, but when operating in pfm mode at light loads, the switching frequency is adjusted to regulate the output voltage. the adp2105/adp2106/adp2107 operate in the pwm mode only when the load current is greater than the pulse-skipping threshold current. at load currents below this value, the converter smoothly transitions to the pfm mode of operation. pwm mode operation in pwm mode, the adp2105/adp2106/adp2107 operate at a fixed frequency of 1.2 mhz set by an internal oscillator. at the start of each oscillator cycle, the p-channel mosfet switch is turned on, putting a positive voltage across the inductor. current in the inductor increases until the current sense signal crosses the peak inductor current level that turns off the p-channel mosfet switch and turns on the n-channel mosfet synchro- nous rectifier. this puts a negative voltage across the inductor, causing the inductor current to decrease. the synchronous rectifier stays on for the remainder of the cycle, unless the inductor current reaches zero, which causes the zero-crossing comparator to turn off the n-channel mosfet. the peak inductor current is set by the voltage on the comp pin. the comp pin is the output of a transconductance error amplifier that compares the feedback voltage with an internal 0.8 v reference. pfm mode operation the adp2105/adp2106/adp2107 smoothly transition to the variable frequency pfm mode of operation when the load current decreases below the pulse skipping threshold current, switching only as necessary to maintain the output voltage within regulation. when the output voltage dips below regulation, the adp2105/ adp2106/adp2107 enter pwm mode for a few oscillator cycles to increase the output voltage back to regulation. during the wait time between bursts, both power switches are off, and the output capacitor supplies all the load current. because the output voltage dips and recovers occasionally, the output voltage ripple in this mode is larger than the ripple in the pwm mode of operation. pulse-skipping threshold the output current at which the adp2105/adp2106/adp2107 transition from variable frequency pfm control to fixed frequency pwm control is called the pulse-skipping threshold. the pulse- skipping threshold is optimized for excellent efficiency over all load currents. the variation of pulse-skipping threshold with input voltage and output voltage is shown in figure 25 , figure 27 , and figure 28 . 100% duty cycle operation (ldo mode) as the input voltage drops, approaching the output voltage, the adp2105/adp2106/adp2107 smoothly transition to 100% duty cycle, maintaining the p-channel mosfet switch-on conti- nuously. this allows the adp2105/adp2106/adp2107 to regulate the output voltage until the drop in input voltage forces the p- channel mosfet switch to enter dropout, as shown in the following equation: v in(min) = i out ( r ds(on) ? p + dcr ind ) + v out(nom) the adp2105/adp2106/adp2107 achieve 100% duty cycle operation by stretching the p-channel mosfet switch-on time if the inductor current does not reach the peak inductor current level by the end of the clock cycle. when this happens, the oscil- lator remains off until the inductor current reaches the peak inductor current level, at which time the switch is turned off and the synchronous rectifier is turned on for a fixed off time. at the end of the fixed off time, another cycle is initiated. as the adp2105/adp2106/adp2107 approach dropout, the switching frequency decreases gradually to smoothly transition to 100% duty cycle operation.
adp2105/adp2106/adp2107 rev. c | page 15 of 36 slope compensation slope compensation stabilizes the internal current control loop of the adp2105/adp2106/adp2107 when operating beyond 50% duty cycle to prevent subharmonic oscillations. it is imple- mented by summing a fixed, scaled voltage ramp to the current sense signal during the on-time of the p-channel mosfet switch. the slope compensation ramp value determines the minimum inductor that can be used to prevent subharmonic oscillations at a given output voltage. for slope compensation ramp values, see table 5 . for more information see the inductor selection section. table 5. slope compensation ramp values part slope compensation ramp values adp2105 0.72 a/s adp2106 1.07 a/s adp2107 1.38 a/s design features enable/shutdown drive en high to turn on the adp2105/adp2106/adp2107. drive en low to turn off the adp2105/adp2106/adp2107, reducing the input current below 0.1 a. to force the adp2105/adp2106/adp2107 to automatically start when input power is applied, connect en to in. when shut down, the adp2105/adp2106/adp2107 discharge the soft start capacitor, causing a new soft start cycle every time they are re-enabled. synchronous rectification in addition to the p-channel mosfet switch, the adp2105/ adp2106/adp2107 include an integrated n-channel mosfet synchronous rectifier. the synchronous rectifier improves effi- ciency, especially at low output voltage, and reduces cost and board space by eliminating the need for an external rectifier. current limit the adp2105/adp2106/adp2107 have protection circuitry to limit the direction and amount of current flowing through the power switch and synchronous rectifier. the positive current limit on the power switch limits the amount of current that can flow from the input to the output, and the negative current limit on the synchronous rectifier prevents the inductor current from reversing direction and flowing out of the load. short-circuit protection the adp2105/adp2106/adp2107 include frequency foldback to prevent output current runaway on a hard short. when the voltage at the feedback pin falls below 0.3 v, indicating the possi- bility of a hard short at the output, the switching frequency is reduced to 1/4 of the internal oscillator frequency. the reduction in the switching frequency results in more time for the inductor to discharge, preventing a runaway of output current. undervoltage lockout (uvlo) to protect against deep battery discharge, uvlo circuitry is integrated on the adp2105/adp2106/adp2107. if the input voltage drops below the 2.2 v uvlo threshold, the adp2105/adp2106/adp2107 shut down, and both the power switch and synchronous rectifier turn off. when the voltage again rises above the uvlo threshold, the soft start period is initiated, and the part is enabled. thermal protection in the event that the adp2105/adp2106/adp2107 junction temperatures rise above 140 c, the thermal shutdown circuit turns off the converter. extreme junction temperatures can be the result of high current operation, poor circuit board design, and/or high ambient temperature. a 40 c hysteresis is included so that when thermal shutdown occurs, the adp2105/adp2106/ adp2107 do not return to operation until the on-chip tempera- ture drops below 100 c. when coming out of thermal shutdown, soft start is initiated. soft start the adp2105/adp2106/adp2107 include soft start circuitry to limit the output voltage rise time to reduce inrush current at startup. to set the soft start period, connect the soft start capacitor (c ss ) from ss to agnd. when the adp2105/adp2106/adp2107 are disabled, or if the input voltage is below the undervoltage lockout threshold, c ss is internally discharged. when the adp2105/adp2106/adp2107 are enabled, c ss is charged through an internal 0.8 a current source, causing the voltage at ss to rise linearly. the output voltage rises linearly with the voltage at ss.
adp2105/adp2106/adp2107 rev. c | page 16 of 36 applications information external component selection the external component selection for the adp2105/adp2106/ adp2107 application circuits shown in figure 37 and figure 38 depend on input voltage, output voltage, and load current requirements. additionally, trade-offs between performance parameters like efficiency and transient response can be made by varying the choice of external components. setting the output voltage the output voltage of adp2105/adp2106/adp2107(adj) is externally set by a resistive voltage divider from the output voltage to fb. the ratio of the resistive voltage divider sets the output voltage, and the absolute value of those resistors sets the divider string current. for lower divider string currents, the small 10 na (0.1 a maximum) fb bias current is to be taken into account when calculating resistor values. the fb bias current can be ignored for a higher divider string current, but this degrades efficiency at very light loads. to limit output voltage accuracy degradation due to fb bias current to less than 0.05% (0.5% maximum), ensure that the divider string current is greater than 20 a. to calculate the desired resistor values, first determine the value of the bottom divider string resistor ( r bot ) using the following equation: string fb bot i v r = where: v fb = 0.8 v, the internal reference. i string is the resistor divider string current. off en ss lx2 agnd output voltage = 1.2v, 1.5v, 1.8v, 3.3 v comp on pgnd gnd gnd gnd nc lx1 pwin2 v in v in input voltage = 2.7v to 5.5v v out c ss r comp c comp 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 l c out load c in2 c in1 10? 0.1 f nc = no connect adp2105/ adp2106/ adp2107 06079-065 v out fb pwin1 in gnd figure 37. typical applications circuit for fixed output voltage options of adp2105/adp2106/adp2107(x.x v) off en ss lx2 fb pwin1 agnd output voltage = 0.8v to v in comp on pgnd in gnd gnd gnd nc gnd lx1 pwin2 v in v in input voltage = 2.7v to 5.5v fb c ss r comp c comp 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 l c out load c in2 c in1 10? 0.1 f r top r bot fb nc = no connect adp2105/ adp2106/ adp2107 06079-038 figure 38. typical applications circuit for adjustable output voltage option of adp2105/adp2106/adp2107(adj)
adp2105/adp2106/adp2107 rev. c | page 17 of 36 when r bot is determined, calculate the value of the top resistor ( r top ) by using the following equation: ? ? ? ? ? ? ? = fb fb out bot top v vv rr the adp2105/adp2106/adp2107(x.x v) include the resistive voltage divider internally, reducing the external circuitry required. for improved load regulation, connect the fb to the output voltage as close as possible to the load. inductor selection the high switching frequency of adp2105/adp2106/adp2107 allows for minimal output voltage ripple even with small inductors. the sizing of the inductor is a trade-off between efficiency and transient response. a small inductor leads to larger inductor current ripple that provides excellent transient response but degrades efficiency. due to the high switching frequency of adp2105/adp2106/adp2107, shielded ferrite core inductors are recommended for their low core losses and low electromagnetic interference (emi). as a guideline, the inductor peak-to-peak current ripple (i l ) is typically set to 1/3 of the maximum load current for optimal transient response and efficiency, as shown in the following equations: 3 ) ( )( max load sw in out in out l i lfv vvv i ? = h ) (5.2 )( max load in out in out ideal iv vvv l ? =? where f sw is the switching frequency (1.2 mhz). the adp2105/adp2106/adp2107 use slope compensation in the current control loop to prevent subharmonic oscillations when operating beyond 50% duty cycle. the fixed slope compen- sation limits the minimum inductor value as a function of output voltage. for the adp2105 l > (1.12 h/v) v out for the adp2106 l > (0.83 h/v) v out for the adp2107 l > (0.66 h/v) v out inductors 4.7 h or larger are not recommended because they may cause instability in discontinuous conduction mode under light load conditions. it is also important that the inductor be capable of handling the maximum peak inductor current (i pk ) determined by the following equation: ? ? ? ? ? ? + = 2 )( l max load pk i ii ensure that the maximum rms current of the inductor is greater than the maximum load current and that the saturation current of the inductor is greater than the peak current limit of the converter used in the application. table 6. minimum inductor value for common output voltage options for the adp2105 (1 a) v out v in 2.7 v 3.6 v 4.2 v 5.5 v 1.2 v 1.67 h 2.00 h 2.14 h 2.35 h 1.5 v 1.68 h 2.19 h 2.41 h 2.73 h 1.8 v 2.02 h 2.25 h 2.57 h 3.03 h 2.5 v 2.80 h 2.80 h 2.80 h 3.41 h 3.3 v 3.70 h 3.70 h 3.70 h 3.70 h table 7. minimum inductor value for common output voltage options for the adp2106 (1.5 a) v out v in 2.7 v 3.6 v 4.2 v 5.5 v 1.2 v 1.11 h 2.33 h 2.43 h 1.56 h 1.5 v 1.25 h 1.46 h 1.61 h 1.82 h 1.8 v 1.49 h 1.50 h 1.71 h 2.02 h 2.5 v 2.08 h 2.08 h 2.08 h 2.27 h 3.3 v 2.74 h 2.74 h 2.74 h 2.74 h table 8. minimum inductor value for common output voltage options for the adp2107 (2 a) v out v in 2.7 v 3.6 v 4.2 v 5.5 v 1.2 v 0.83 h 1.00 h 1.07 h 1.17 h 1.5 v 0.99 h 1.09 h 1.21 h 1.36 h 1.8 v 1.19 h 1.19 h 1.29 h 1.51 h 2.5 v 1.65 h 1.65 h 1.65 h 1.70 h 3.3 v 2.18 h 2.18 h 2.18 h 2.18 h table 9. inductor recommendations for the adp2105/ adp2106/adp2107 vendor small-sized inductors (< 5 mm 5 mm) large-sized inductors (> 5 mm 5 mm) sumida cdrh2d14, 3d16, 3d28 cdrh4d18, 4d22, 4d28, 5d18, 6d12 toko 1069as-db3018, 1098as-de2812, 1070as-db3020 d52lc, d518lc, d62lcb coilcraft lps3015, lps4012, do3314 do1605t cooper bussmann sd3110, sd3112, sd3114, sd3118, sd3812, sd3814 sd10, sd12, sd14, sd52
adp2105/adp2106/adp2107 rev. c | page 18 of 36 output capacitor selection the output capacitor selection affects both the output voltage ripple and the loop dynamics of the converter. for a given loop crossover frequency (the frequency at which the loop gain drops to 0 db), the maximum voltage transient excursion (overshoot) is inversely proportional to the value of the output capacitor. therefore, larger output capacitors result in improved load transient response. to minimize the effects of the dc-to-dc converter switching, the cross- over frequency of the compensation loop should be less than 1/10 of the switching frequency. higher crossover frequency leads to faster settling time for a load transient response, but it can also cause ringing due to poor phase margin. lower crossover frequency helps to provide stable operation but needs large output capacitors to achieve competitive overshoot specifications. therefore, the optimal crossover frequency for the control loop of adp2105/adp2106/adp2107 is 80 khz, 1/15 of the switching frequency. for a crossover frequency of 80 khz, figure 39 shows the maximum output voltage excursion during a 1 a load transient, as the product of the output voltage and the output capacitor is varied. choose the output capacitor based on the desired load transient response and target output voltage. 18 0 06079-070 15 70 output capacitor output voltage ( c) overshoot of output voltage (%) 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 20 25 30 35 40 45 50 55 60 65 figure 39. percentage overshoot for a 1 a load transient response vs. output capacitor output voltage for example, if the desired 1 a load transient response (overshoot) is 5% for an output voltage of 2.5 v, then from figure 39 output capacitor output voltage = 50 c f20 5.2 c50 = ? capacitor output the adp2105/adp2106/adp2107 have been designed for operation with small ceramic output capacitors that have low esr and esl. therefore, they are comfortably able to meet tight output voltage ripple specifications. x5r or x7r dielectrics are recommended with a voltage rating of 6.3 v or 10 v. y5v and z5u dielectrics are not recommended, due to their poor temperature and dc bias characteristics. table 10 shows a list of recommended mlcc capacitors from murata and taiyo yuden. when choosing output capacitors, it is also important to account for the loss of capacitance due to output voltage dc bias. figure 40 shows the loss of capacitance due to output voltage dc bias for three x5r mlcc capacitors from murata. 20 ?100 06079-060 voltage (v dc ) capacitance change (%) 0 ?20 ?40 ?60 ?80 0 246 1 3 2 1 4.7f 0805 x5r murata grm21br61a475k 2 10f 0805 x5r murata grm21br61a106k 3 22f 0805 x5r murata grm21br60j226m figure 40. percentage drop-in capa citance vs. dc bias for ceramic capacitors (information provided by murata corporation) for example, to get 20 f output capacitance at an output voltage of 2.5 v, based on figure 40 , as well as to give some margin for temperature variance, a 22 f and a 10 f capacitor are to be used in parallel to ensure that the output capacitance is sufficient under all conditions for stable behavior. table 10. recommended input and output capacitor selection for the adp2105/adp2106/adp2107 capacitor vendor murata taiyo yuden 4.7 f, 10 v x5r 0805 grm21br61a475k lmk212bj475kg 10 f, 10 v x5r 0805 grm21br61a106k lmk212bj106kg 22 f, 6.3 v x5r 0805 grm21br60j226m jmk212bj226mg input capacitor selection the input capacitor reduces input voltage ripple caused by the switch currents on the pwin pins. place the input capacitors as close as possible to the pwin pins. select an input capacitor capable of withstanding the rms input current for the maximum load current in your application. for the adp2105, it is recommended that each pwin pin be bypassed with a 4.7 f or larger input capacitor. for the adp2106, bypass each pwin pin with a 10 f and a 4.7 f capacitor, and for the adp2107, bypass each pwin pin with a 10 f capacitor. as with the output capacitor, a low esr ceramic capacitor is recommended to minimize input voltage ripple. x5r or x7r dielectrics are recommended, with a voltage rating of 6.3 v or 10 v. y5v and z5u dielectrics are not recommended due to their poor temperature and dc bias characteristics. refer to table 10 for input capacitor recommendations.
adp2105/adp2106/adp2107 rev. c | page 19 of 36 input filter the in pin is the power source for the adp2105/adp2106/ adp2107 internal circuitry, including the voltage reference and current sense amplifier that are sensitive to power supply noise. to prevent high frequency switching noise on the pwin pins from corrupting the internal circuitry of the adp2105/adp2106/ adp2107, a low-pass rc filter should be placed between the in pin and the pwin1 pin. the suggested input filter consists of a small 0.1 f ceramic capacitor placed between in and agnd and a 10 resistor placed between in and pwin1. this forms a 150 khz low-pass filter between pwin1 and in that prevents any high frequency noise on pwin1 from coupling into the in pin. soft start period to set the soft start period, connect a soft start capacitor (c ss ) from ss to agnd. the soft start period varies linearly with the size of the soft start capacitor, as shown in the following equation: t ss = c ss 10 9 ms for a soft start period of 1 ms, a 1 nf capacitor must be connected between ss and agnd. loop compensation the adp2105/adp2106/adp2107 utilize a transconductance error amplifier to compensate the external voltage loop. the open loop transfer function at angular frequency (s) is given by ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = out ref out comp cs m v v sc sz ggsh )( )( where: v ref is the internal reference voltage (0.8 v). v out is the nominal output voltage. z comp (s) is the impedance of the co mpensation network at the angular frequency. c out is the output capacitor. g m is the transconductance of the error amplifier (50 a/v nominal). g cs is the effective transcondu ctance of the current loop. g cs = 1.875 a/v for the adp2105. g cs = 2.8125 a/v for the adp2106. g cs = 3.625 a/v for the adp2107. the transconductance error ampl ifier drives the compensation network that consists of a resistor ( r comp ) and capacitor ( c comp ) connected in series to form a pole and a zero, as shown in the following equation: ? ? ? ? ? ? ? ? + = ? ? ? ? ? ? ? ? += comp comp comp comp comp comp sc csr sc rsz 1 1 )( at the crossover frequency, the gain of the open loop transfer function is unity. for the compensation network impedance at the crossover frequency, this yields the following equation: ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = ref out out cs m cross cross comp v vc gg f fz )2( ) ( where: f cross = 80 khz, the crossover frequency of the loop. c out v out is determined from the output capacitor selection section. to ensure that there is sufficient phase margin at the crossover frequency, place the compensator zero at 1/4 of the crossover frequency, as shown in the following equation: 1 4 )2( = ? ? ? ? ? ? comp comp cross cr f solving the three equations in this section simultaneously yields the value for the compensation resistor and compensation capacitor, as shown in the following equation: ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = ref out out cs m cross comp v vc gg f r )2( 8.0 comp cross comp rf c 2 =
adp2105/adp2106/adp2107 rev. c | page 20 of 36 bode plots 60 ?40 1 300 frequency (khz) loop gain (db) 10 100 50 40 30 20 10 0 ?10 ?20 ?30 loop phase (degrees) 0 45 90 135 180 06079-055 loop gain loop phase phase margin = 48 crossover frequency = 87khz adp2106 output voltage = 1.8v input voltage = 5.5v load current = 1a inductor = 2.2h (lps4012) output capacitor = 22f + 22f compensation resistor = 180k ? compensation capacitor = 56pf notes 1. external components were chosen for a 5% overshoot for a 1a load transient. figure 41. adp2106 bode plot at v in = 5.5 v, v out = 1.8 v and load = 1 a 60 ?40 1 300 frequency (khz) loop gain (db) 10 100 50 40 30 20 10 0 ?10 ?20 ?30 loop phase (degrees) 0 45 90 135 180 06079-056 notes 1. external components were chosen for a 5% overshoot for a 1a load transient. adp2106 phase margin = 52 loop gain loop phase output voltage = 1.8v input voltage = 3.6v load current = 1a inductor = 2.2h (lps4012) output capacitor = 22f + 22f compensation resistor = 180k ? compensation capacitor = 56pf crossover frequency = 83khz figure 42. adp2106 bode plot at v in = 3.6 v, v out = 1.8 v, and load = 1 a 60 ?40 1 300 frequency (khz) loop gain (db) 10 100 50 40 30 20 10 0 ?10 ?20 ?30 loop phase (degrees) 0 45 90 135 180 06079-057 adp2105 notes 1. external components were chosen for a 5% overshoot for a 1a load transient. loop gain loop phase phase margin = 51 crossover frequency = 71khz output voltage = 1.2v input voltage = 3.6v load current = 1a inductor = 3.3h (sd3814) output capacitor = 22f + 22f + 4.7f compensation resistor = 267k ? compensation capacitor = 39pf figure 43. adp2105 bode plot at v in = 3.6 v, v out = 1.2 v, and load = 1 a 60 ?40 1 300 frequency (khz) loop gain (db) 10 100 50 40 30 20 10 0 ?10 ?20 ?30 loop phase (degrees) 0 45 90 135 180 06079-058 adp2105 notes 1. external components were chosen for a 5% overshoot for a 1a load transient. crossover frequency = 79khz phase margin = 49 loop gain loop phase output voltage = 1.2v input voltage = 5.5v load current = 1a inductor = 3.3h (sd3814) output capacitor = 22f + 22f + 4.7f compensation resistor = 267k ? compensation capacitor = 39pf figure 44. adp2105 bode plot at v in = 5.5 v, v out = 1.2 v and load = 1 a 60 ?40 1 300 frequency (khz) loop gain (db) 10 100 50 40 30 20 10 0 ?10 ?20 ?30 loop phase (degrees) 0 45 90 135 180 06079-059 adp2107 notes 1. external components were chosen for a 10% overshoot for a 1a load transient. phase margin = 65 crossover frequency = 76khz output voltage = 2.5v input voltage = 5v load current = 1a inductor = 2h (d62lcb) output capacitor = 10f + 4.7f compensation resistor = 70k ? compensation capacitor = 120pf loop phase loop gain figure 45. adp2107 bode plot at v in = 5 v, v out = 2.5 v and load = 1 a 60 ?40 1 300 frequency (khz) loop gain (db) 10 100 50 40 30 20 10 0 ?10 ?20 ?30 loop phase (degrees) 0 45 90 135 180 06079-069 adp2107 notes 1. external components were chosen for a 10% overshoot for a 1a load transient. loop gain loop phase phase margin = 70 output voltage = 3.3v input voltage = 5v load current = 1a inductor = 2.5h (cdrh5d28) output capacitor = 10f + 4.7f compensation resistor = 70k ? compensation capacitor = 120pf crossover frequency = 67khz figure 46. adp2107 bode plot at v in = 5 v, v out = 3.3 v, and load = 1 a
adp2105/adp2106/adp2107 rev. c | page 21 of 36 load transient response 06079-087 ch2 100mv~ ch1 2.00v ch3 1.00a ? m 20.0s a ch3 700ma 1 3 2 t 10.00% t lx node (switch node) output voltage (ac-coupled) output current output capacitor: 22f + 22f + 4.7f inductor: sd14, 2.5h compensation resistor: 270k ? compensation capacitor: 39pf figure 47. 1 a load transient response for adp2105-1.2 with external components chosen for 5% overshoot 06079-088 ch2 100mv~ ch1 2.00v ch3 1.00a ? m 20.0s a ch3 700ma 1 3 2 t 10.00% t lx node (switch node) output voltage (ac-coupled) output current output capacitor: 22f + 22f inductor: sd3814, 3.3h compensation resistor: 270k ? compensation capacitor: 39pf figure 48. 1 a load transient response for adp2105-1.8 with external components chosen for 5% overshoot 06079-089 ch2 200mv~ ch1 2.00v ch3 1.00a ? m 20.0s a ch3 700ma t 10.00% 1 3 2 t lx node (switch node) output voltage (ac-coupled) output current output capacitor: 22f + 4.7f inductor: cdrh5d18, 4.1h compensation resistor: 270k ? compensation capacitor: 39pf figure 49. 1 a load transient response for adp2105-3.3 with external components chosen for 5% overshoot 06079-090 ch2 100mv~ ch1 2.00v ch3 1.00a ? m 20.0s a ch3 700ma 1 3 2 t 10.00% t lx node (switch node) output voltage (ac-coupled) output current output capacitor: 22f + 4.7f inductor: sd14, 2.5h compensation resistor: 135k ? compensation capacitor: 82pf igure 50. 1 a load transient response for adp2105-1.2 f with external components chosen for 10% overshoot 06079-091 ch2 100mv~ ch1 2.00v ch3 1.00a ? m 20.0s a ch3 700ma 1 3 2 t 10.00% t output voltage (ac-coupled) lx node (switch node) output current output capacitor: 10f + 10f inductor: sd3814, 3.3h compensation resistor: 135k ? compensation capacitor: 82pf figure 51. 1 a load transient response for adp2105-1.8 with external components chosen for 10% overshoot 06079-092 ch2 200mv~ ch1 2.00v ch3 1.00a ? m 20.0s a ch3 700ma 1 3 2 t 10.00% t lx node (switch node) output voltage (ac-coupled) output current output capacitor: 10f + 4.7f inductor: cdrh5d18, 4.1h compensation resistor: 135k ? compensation capacitor: 82pf figure 52. 1 a load transient response for adp2105-3.3 with external components chosen for 10% overshoot
adp2105/adp2106/adp2107 rev. c | page 22 of 36 efficiency considerations efficiency is the ratio of output power to input power. the high efficiency of the adp2105/adp2106/adp2107 has two distinct advantages. first, only a small amount of power is lost in the dc- to-dc converter package that reduces thermal constraints. second, the high efficiency delivers the maximum output power for the given input power, extending battery life in portable applications. there are four major sources of power loss in dc-to-dc converters like the adp2105/adp2106/adp2107: ? power switch conduction losses ? inductor losses ? switching losses ? transition losses power switch conduction losses power sw output current t channel al resistances ( r ds(on) ) i- e, r ds(on) vs. sses are caused by the flow of current hich has an internal resistance (dcr) rs have smaller dcr, al is recommended for its low core losses and low emi. the core losses n charge q from the input nd then from the gate to ground. f an l e t r switch is providing all the in o drain voltage of the he input voltage, resulting in power loss. itch conduction losses are caused by the flow of hrough the p-channel power switch and the n- synchronous rectifier, which have intern associated with them. the amount of power loss can be approx mated by p sw ? cond = [ r ds(on) ? p d + r ds(on) ? n (1 ? d )] i out 2 where d = v out /v in . the internal resistance of the power switches increases with temperature but decreases with higher input voltage. figure 20 and figure 21 show the change in r ds(on) vs. input voltag whereas figure 29 and figure 30 show the change in t emperature for both power devices. i nductor losses i nductor conduction lo t hrough the inductor, w associated with it. larger sized inducto which can improve inductor conduction losses. inductor core losses are related to the magnetic permeability of the core material. because the adp2105/adp2106/adp2107 are high switching frequency dc-to-dc converters, shielded ferrite core materi total amount of inductor power loss can be calculated by p l = dcr i out 2 + switching losses switching losses are associated with the current drawn by the driver to turn on and turn off the power devices at the switching frequency. each time a power device gate is turned o and turned off, the driver transfers a supply to the gate a the amount of power loss can by calculated by p sw = ( c gate ? p + c gate ? n ) v in 2 f sw where: ( c gate ? p + c gate ? n ) 600 pf. f sw = 1.2 mhz, the switching frequency. transition losses transition losses occur because the p-channel mosfet power switch cannot turn on or turn off instantaneously. at the middle o x (switch) nod ransition, the powe ductor current, while the source t power switch is half t transition losses increase with load current and input voltage and occur twice for each switching cycle. the amount of power loss can be calculated by sw off on out in tran ftti v p += )( 2 where t on and t off are the rise time and fall time o f the lx (swi ns. al considerations p2107 do not ficiency. however, in ambient temperature, low supply voltage, s pplication solution nce over all the junction temperature of the die is th m of the ambient t h f the wing l p d ermal resistance from the junction of the die to the amb e of the package. tch) node, and are both approximately 3 therm in most applications, the adp2105/adp2106/ad dissipate a lot of heat due to their high ef applications with high and high duty cycle, the heat dissipated in the package is large enough that it can cause the junction temperature of the die to exceed the maximum junction temperature of 125c. once the junction temperature exceeds 140c, the converter goes into thermal shutdown. to prevent any permanent damage it recover only after the junction temperature has decreased below 100c. therefore, thermal analysis for the chosen a is very important to guarantee reliable performa conditions. e su tempera ure of t e environment and the temperature rise o package due to the power dissipation, as shown in the follo equation: t = t + t j a r where: t j is the junction temperature. t a is the ambient temperature. t r is the rise in temperature of the package due to the power dissipation in the package. the rise in temperature of the package is directly proportiona to the power dissipation in the package. the proportionality constant for this relationship is defined as the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: t r = ja where: t r is the rise in temperature of the package. p d is the power dissipation in the package. ja is the th ient temperatur
adp2105/adp2106/adp2107 rev. c | page 23 of 36 f 3.6 v, a load current of 2 a, and a . ection, the power dissipation in th be calculated by the following: ? d )] i out 2 = 400 mw the ja for the lfcsp_vq package is 40c/w, as shown in table 3 . therefore, the rise in temperature of the package due to power dissipation is t r = ja p d = 40c/w 0.40 w = 16c the junction temperature of the converter is t j = t a + t r = 85c + 16c = 101c because the junction temperature of the converter is below the maximum junction temperature of 125c, this application operates reliably from a thermal point of view. for example, in an application where the adp2107(1.8 v) is used with an input voltage o maximum ambient temperature of 85c, at a load current of 2 a, the most significant contributor of power dissipation in the dc-to- dc converter package is the conduction loss of the power switches using the graph of switch on resistance vs. temperature (see figure 30 ), as well as the equation of power loss given in the pow s c duction losses s er wit h con e package can p sw ? cond = [ r ds(on) ? p d + r ds(on) ? n (1 [109 m 0.5 + 90 m 0.5] (2 a) 2
adp2105/adp2106/adp2107 rev. c | page 24 of 36 ns. 1. utput a maximum output current of 1.5 a is ideal for this application. 2. see whether the output voltage desired is available as a fixed output voltage option. because 2 v is not one of the fixed output voltage options available, choose the adjustable version of adp2106. 3. the first step in external component selection for an adjustable version converter is to calculate the resistance of the resistive voltage divider that sets the output voltage. design example consider an application with the following specifications: input voltage = 3.6 v to 4.2 v. output voltage = 2 v. typical output current = 600 ma. maximum output current = 1.2 a. soft start time = 2 ms. overshoot 100 mv under all load transient conditio choose the dc-to-dc converter that satisfies the maximum output current requirement. because the maximum o current for this application is 1.2 a, the adp2106 with k 40 a20 v8.0 === string fb bot i v r k 60 v8.0 v8.0v2 k 40 = ? ? ? ? ? ? ? ? ? = ? ? ? ? ? ? ? = fb fb out bot top v vv rr 4. the closest standard inductor value is 2.2 h. the maximum r rms cu rent of the inductor is to be greater than 1.2 a, and the saturation current of the inductor is to be greater than ia is the lps4012- ad transient, the overshoot must be less than 4% of the output voltage, then from figure 39 : output capacitor output voltage = 60 c 2 a. one inductor that meets these criter 2.2 h from coilcraft. 5. choose the output capacitor based on the transient response requirements. the worst-case load transient is 1.2 a, for which the overshoot must be less than 100 mv, which is 5% of the output voltage. for a 1 a lo f30 v0.2 c60 = ? capacitor output taking into account the loss of capacitance due to dc bias, as shown in figure 40 , two 22 f x5r mlcc capacitors from murata (grm21br60j226m) are sufficient for this application. 6. because the adp2106 is being used in this application, the input capacitors are 10 f and 4.7 f x5r murata capacitors (grm21br61a106k and grm21br61a475k). 7. the input filter consists of a small 0.1 f ceramic capacitor placed between in and agnd and a 10 resistor placed between in and pwin1. 8. choose a soft start capacitor of 2 nf to achieve a soft start time of 2 ms. 9. calculate the compensation resistor and capacitor as follows: calculate the minimum inductor value as follows: for the adp2106: l > (0.83 h/v) v out l > 0.83 h/v 2 v l > 1.66 h xt, calculate the ideal inductor value that sets the inductor peak-to-peak current ripple (i l ) to 1/3 of the maximum load current at the maximum input voltage as follows: ? ? ne = ? = h ) (5.2 )( max load in out in out ideal iv vvv l h2.18h 2.12.4 )22.4(25.2 = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = ref out out cs m cross comp v vc gg f r )2( 8.0 = k 215 v8.0 v2f30 v/a8125.2v/a50 khz80)2( 8.0 = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? pf39 k 215khz80 2 2 = = = comp cross comp rf c
adp2105/adp2106/adp2107 rev. c | page 25 of 36 ent recommendations que ponents f) c in2 1 (f) c out 2 (f) mp (pf) r top 3 (k) r bot 3 (k) external compon for popular output voltage options at 80 khz crossover fre nc y with 10% overshoot for a 1 a load transient (refer to figure 37 and l (h) r comp (k) c co figure 38 ). table 11. recommended external com part v out (v) c in1 1 ( adp2105(adj) 0.9 4.7 4.7 22 + 10 2. 0 135 82 5 40 adp2105(adj) 1.2 4.7 4.7 22 + 4.7 2.5 135 82 20 40 adp2105(adj) 1.5 4.7 4.7 10 + 10 3.0 135 82 35 40 ad p2105(adj) 1.8 4.7 4.7 10 + 10 3.3 135 82 50 40 adp2105(adj) 2.5 4.7 4.7 10 + 4. 7 3.6 135 82 85 40 adp2105(adj) 3.3 4.7 4.7 10 + 4.7 82 125 40 4.1 135 adp2106(adj) 0.9 4.7 10 22 + 10 1.5 40 90 100 5 ad p2106(adj) 1.2 4.7 10 22 + 4.7 1.8 40 90 100 20 adp2106(adj) 1.5 4.7 10 10 + 1 0 2.0 90 100 35 40 adp2106(adj) 1.8 4.7 10 10 + 1 0 2.2 90 100 50 40 adp2106(adj) 2.5 4.7 10 10 + 4 .7 2.5 90 100 85 40 ad p2106(adj) 3.3 4.7 10 10 + 4.7 3.0 90 100 125 40 adp2107(adj) 0.9 10 10 22 + 10 1.2 70 120 5 40 adp2107(adj) 1.2 10 10 22 + 4.7 1.5 70 120 20 40 adp2107(adj) 1.5 10 10 10 + 1 0 1 .5 70 120 35 40 adp2107(adj) 1.8 10 10 10 + 10 1.8 70 120 50 40 adp2107(adj) 2.5 10 10 10 + 4.7 1.8 70 120 85 40 adp2107(adj) 3.3 10 10 10 + 4.7 2. 5 70 120 125 40 adp2105-1.2 1.2 4.7 4.7 22 + 4.7 2.5 135 82 n/a n/a adp2105-1.5 1.5 4.7 4.7 10 + 10 3.0 135 82 n/a n/a adp 10 + 10 2105-1.8 1.8 4.7 4.7 3. 3 135 82 n/a n/a adp2105-3.3 10 + 4.7 3.3 4.7 4.7 4.1 135 82 n/a n/a adp 4.7 10 22 + 4.7 2106-1.2 1.2 1. 8 90 100 n/a n/a adp 4.7 10 10 + 10 2106-1.5 1.5 2.0 90 100 n/a n/a adp210 .7 10 10 + 10 100 n/a n/a 6-1.8 1.8 4 2.2 90 adp210 4.7 10 10 + 4.7 3.0 90 100 n/a n/a 6-3.3 3.3 adp 1.5 70 120 n/a /a 2107-1.2 1.2 10 10 22 + 4.7 n adp 10 1.5 70 120 n/a n/a 2107-1.5 1.5 10 10 10 + adp 0 1.8 70 120 n/a n/a 2107-1.8 1.8 10 10 10 + 1 adp 3.3 10 10 10 + 4.7 2.5 70 120 n/a n/a 2107-3.3 1 4.7 f 0805 x5r 10 v muratag rm21br61a475ka73l. 10 f 0805 x5r 10 v muratagrm 21br61a106ke19l. 2 4.7 f 0805 x5r 10 v muratagrm21br61a475k a73l. 10 f 0805 x5r 10 v muratagrm21br 61a106ke19l. 22 f 0805 x5r 6.3 v muratagrm 21br60j226me39l. 3 0.5% accuracy resistor.
adp2105/adp2106/adp2107 rev. c | page 26 of 36 % overshoot for a 1 a load transient (refer to figure 37 and commended external components f) c out 2 (f) l (h) r comp (k) c comp (pf) r top 3 (k) r bot 3 (k) for popular output voltage options at 80 khz crossover frequency with 5 figure 38 ). table 12. re part v out (v) c in1 1 (f) c in2 1 ( adp2105(adj) 0.9 4.7 4.7 22 + 22 + 22 2.0 270 39 5 40 adp2 105(adj) 7 3 2 1.2 4.7 4.7 22 + 22 + 4. 2.5 270 9 0 40 adp2105(adj) 1.5 7 3 3 4. 4.7 22 + 22 3.0 270 9 5 40 adp2105(adj) 1.8 7 3 5 4. 4.7 22 + 22 3.3 270 9 0 40 adp2105(adj) 2.5 7 3 8 4. 4.7 22 + 10 3.6 270 9 5 40 adp2105(adj) 3.3 7 3 1 4. 4.7 22 + 4.7 4.1 270 9 25 40 adp2106(adj) 0.9 7 22 5 5 4. 10 22 + 22 + 1.5 180 6 40 adp2106(adj) 1.2 7 4.7 5 2 4. 10 22 + 22 + 1.8 180 6 0 40 adp2106(adj) 1.5 7 5 3 4. 10 22 + 22 2.0 180 6 5 40 adp2106(adj) 1.8 7 5 5 4. 10 22 + 22 2.2 180 6 0 40 adp2106(adj) 2.5 7 5 8 4. 10 22 + 10 2.5 180 6 5 40 adp2106(adj) 3.3 7 5 1 4. 10 22 + 4.7 3.0 180 6 25 40 adp2107(adj) 0.9 22 6 5 10 10 22 + 22 + 1.2 140 8 40 adp2107(adj) 1.2 4.7 6 2 10 10 22 + 22 + 1.5 140 8 0 40 adp2107(adj) 1.5 0 6 3 1 10 22 + 22 1.5 140 8 5 40 adp2107(adj) 1.8 0 6 5 1 10 22 + 22 1.8 140 8 0 40 adp2107(adj) 2.5 0 6 8 1 10 22 + 10 1.8 140 8 5 40 adp2107(adj) 3.3 0 6 1 1 10 22 + 4.7 2.5 140 8 25 40 adp2105-1.2 1.2 7 4.7 3 n 4. 4.7 22 + 22 + 2.5 270 9 /a n/a adp2105-1.5 1.5 7 3 n 4. 4.7 22 + 22 3.0 270 9 /a n/a adp2105-1.8 1.8 7 3 n 4. 4.7 22 + 22 3.3 270 9 /a n/a adp2105-3.3 3.3 7 3 n 4. 4.7 22 + 4.7 4.1 270 9 /a n/a adp2106-1.2 1.2 7 4.7 5 n 4. 10 22 + 22 + 1.8 180 6 /a n/a adp2106-1.5 1.5 7 5 n 4. 10 22 + 22 2.0 180 6 /a n/a adp2106-1.8 1.8 7 5 n 4. 10 22 + 22 2.2 180 6 /a n/a adp2106-3.3 3.3 7 5 n 4. 10 22 + 4.7 3.0 180 6 /a n/a adp2107-1.2 1.2 4.7 6 n 10 10 22 + 22 + 1.5 140 8 /a n/a adp2107-1.5 1.5 6 n 10 10 22 + 22 1.5 140 8 /a n/a adp2107-1.8 1.8 0 6 n 1 10 22 + 22 1.8 140 8 /a n/a adp2107-3.3 3.3 0 6 n 1 10 22 + 4.7 2.5 140 8 /a n/a 1 4.7f 0805 x5r 2 10v tagrm 61a475ka7 f 0805 x5 tag r61a106ke19l. 4.7f 0805 x5r 10v muratagrm21br61a475ka 73l. 10f 0805 x5r 10v murata grm21br61a106ke19l. 22f 0805 x5r 6.3v muratagrm21br60 j226me39l. mura 21br 3l. 10 r 10v mura rm21b 3 0.5% accuracy resistor.
adp2105/adp2106/adp2107 rev. c | page 27 of 36 t board layout is essential to obtaining the best 07. poor t layout degrades t utp s w n ence (e and elec agnetic mc rforma igu show t eal circui ard layo dp2106/adp2 o achiev hes efer he follo guidelin ustm you eeded te a g and p ground es. con re ce of se e analog uitry (s ion and output mpone und nect th und refe e of pow s input utput ca ors) to p dd , connec the gro planes t d o adp210 dp2106/a 2107. wi n, place nput capa r as clos as p le and c ect the ot nd to th nd e. .1 low s input fil etween he pw 1 pin, as close to the in pin as po hat th h curre ops are as short and as le. ma e high ent path f c in thr nd th nd pla ck to c in ort as p plish , ensure the inpu d outpu ha ommo nd plan ? make the high current path from the pgnd pin through l and c out back to the pgnd plane as short as possible. to om e p s ti pgnd plane as clo s possible to the input an tput capac the f ck resis ivider net to be p d as close ssible to to ent noise pickup. the lengt ace con ing the top e feedba esistor divid utp to be as sh s possibl ile keepi ay from gh curr races and x (swit de that lead to noi ickup. an log groun ne is to laced on ei r side of th trace to red oise pic . for the lo xed voltag tions (1.2 v 1.5 v), r routing o out_sen trace can le oise pi , adversely ing load r tion. this fixed by cing a 1 nf pass capacit lose to the f . the placement and r ting of the co pensation co ponents are cr or prop havior of th adp2105/a 106/ adp210 om sation com ts are to laced as clos the comp pin as possib is advisab use 0402- compen on compon or closer t, leadi aller sitics. surr the com tion comp ts with a alog grou ne to pr noise picku etal l under the sation c nents is to b analog g d plane. circuit board layout recommendations good circui performance from the adp2105/adp2106/adp21 circui he o ut ripple, a ell as the electromagnetic i terfer mi) trom compatibility (e ) pe nce. figure 54 and f re 55 he id t bo ut for the adp2105/a 107 t e the hig t performance. r to t wing es if adj ents to the suggested la t are n : ? use separa nalo ower plan nect the ground feren nsitiv circ uch as compensat voltage divid er co nts) to analog gro ; con e gro renc er components (s uch a and o pacit ower ground. in a ition t both und o the exposed pa f the 5/a dp ? for each p n pi an i cito e to the pwin pin ossib onn her e e closest power grou plan ? place the 0 f, 10 -pas ter b the in pin and t in ssible. ? ensure t e hig nt lo wide as possib l, c , a ke th e pg curr ne ba rom as sh ough ossible. out to accom this that t an t capacitors s re a c n pg e. acc plish this, en sure that th gnd pin i ed to the se a d ou itors. ? eedba tor d work is lace as po the fb pin prev h of tr nect of th ck r er to the o ut is ort a e wh ng aw the hi ent t the l ch) no can se p ana d pla be p the e fb uce n kup w fi e op and poo f the se ad to n ckup affect egula can be pla by or c b pin ? ou m m itical f er be e dp2 7. the c pen ponen be p e to sized le. it ents f le to placemen sati ng to sm para ound pensa onen n an nd pla event p. the m ayer compen ompo e the roun
adp2105/adp2106/adp2107 rev. c | page 28 of 36 7 evaluation board evaluation board schema tic for adp210 vcc (1.8 v) input voltage = 2.7v to 5.5v vin j1 u1 en out o utput voltage = 1.8v, 2a v out gnd ut 2 1 gnd vcc o vcc a dp2107-1.8 ss agnd comp pgnd gnd gnd gnd nc paddle lx1 pwin en lx2 2 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 r2 100k? c6 68pf c5 1nf r1 140k? c2 10f 1 l1 2 2h c3 22f 1 c4 22f 1 r4 0 ? r5 ns r3 10 ? c7 0.1f c1 10f 1 fb pwin1 in gnd nc = no connec t 06079-044 1 murata x5r 0805 10 f: grm21br61a106ke19l 22 f: grm21br60j226me39l 2 2 h inductor d62lcb toko dp2107-1.8 (bold traces are high current paths) layout) f igure 53. evaluation board schematic of t he a d r ecommended pcb layout (evaluation boar ground gr ound connect the ground return of all power components such as input and output capacitors to the power ground plane. power ground plane output capacitor output capacitor c out input capacitor input capacitor output v out c in c out c in v in input place the feedback resistors as close to the fb pin as possible. adp2105/adp2106/adp2107 r top r bot c ss r comp c comp place the compensation components as close to the comp pin as possible. analog ground plane connect the ground return of all sensitive analog circuitry such as compensation and output voltage divider to the analog ground plane. lx lx jumper to enable enable 100k? pull-down pgnd inductor (l) power ground 6079-045 0 figure 54. recommended layout of top layer of adp2105/adp2106/adp2107
adp2105/adp2106/adp2107 rev. c | page 29 of 36 power ground plane input voltage plane connecting the two pwin pins as close as possible. connect the pgnd pin to the power ground plane as close to the adp2105/adp2106/adp2107 as possible. connect the exposed pad of the adp2105/adp2106/adp2107 to a large ground plane to aid power dissipation. feedback trace: this trace connects the resistive voltage divider on the fb pin to t top of the he output. place this trace as far away from the lx node and high current traces as possible to prevent noise pickup. v in gn v in analog ground plane e d gnd 06079-046 enabl v out figure 55. recommended layout of bottom layer of adp2105/adp2106/adp2107
adp2105/adp2106/adp2107 rev. c | page 30 of 36 application circuits adp2107-3.3 off en ss lx2 agnd output voltage = 3.3v comp on pgnd gnd gnd gnd nc lx1 pwin2 v in v in input voltage = 5v 10 f 1 v out v out 1nf 70k? 120pf 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 2.5 h 2 4.7 f 1 load 0a to 2a 10 f 1 10 f 1 10? 0.1 f 1 murata x5r 0805 10 f: grm21br61a106ke19l 4.7 f: grm21br61a475ka73l 2 sumida cdrh5d28: 2.5 h notes 1. nc = no connect. 2. external components were chosen for a 10% overshoot for a 1a load transient. 0 6079-047 fb pwin1 in gnd figure 56. application circuitv in = 5 v, v out = 3.3 v, load = 0 a to 2 a adp2107-1.5 off en ss lx2 agnd output voltage = 1.5v comp on pgnd gnd 22 f 1 gnd gnd nc lx1 pwin2 v in v in input voltage = 3.6v v out v out 1nf 140k ? 68pf 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 1.5 h 2 0a to 2a 22 f 1 load 10 f 1 10? 0.1 f 10 f 1 1 murata x5r 0805 10 f: grm21br61a106ke19l 22 f: grm21br60j226me39l 2 toko d62lcb or coilcraft lps4012 notes 1. nc = no connect. 2. external components were chosen for a 5% overshoot for a 1a load transient. 06079-048 pwin1 in gnd fb figure 57. application circuitv in = 3.6 v, v out = 1.5 v, load = 0 a to 2 a
adp2105/adp2106/adp2107 rev. c | page 31 of 36 adp2105-1.8 off en ss lx2 agnd output voltage = 1.8v comp on pgnd gnd gnd gnd nc lx1 pwin2 v in v in input voltage = 2.7v to 4.2v 22 f 1 v out v out 1nf 270k ? 39pf 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 2.7 h 2 22 f 1 load 0a to 1a 4.7 f 1 4.7 f 1 10? 0.1 f 1 murata x5r 0805 4.7 f: grm21br61a475ka73l 22 f: grm21br60j226me39l 2 toko 1098as-de2812: 2.7 h notes 1. nc = no connect. 2. external components were chosen for a 5% overshoot for a 1a load transient. 06079-049 pwin1 in gnd fb figure 58. application circuitv in = li-ion battery, v out = 1.8 v, load = 0 a to 1 a adp2105-1.2 off en ss lx2 agnd output voltage = 1.2v comp on pgnd gnd gnd gnd nc lx1 pwin2 v in v in input voltage = 2.7v to 4.2v 22 f 1 v out v out 1nf 135k ? 82pf 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 2.4 h 2 4.7 f 1 load 0a to 1a 4.7 f 1 4.7 f 1 10? 0.1 f 1 murata x5r 0805 4.7 f: grm21br61a475ka73l 22 f: grm21br60j226me39l 2 toko 1069as-db3018hct or toko 1070as-db3020hct notes 1. nc = no connect. 2. external components were chosen for a 10% overshoot for a 1a load transient. 06079-050 pwin1 in gnd fb figure 59. application circuitv in = li-ion battery, v out = 1.2 v, load = 0 a to 1 a
adp2105/adp2106/adp2107 rev. c | page 32 of 36 adp2106-adj off en ss lx2 fb pwin1 agnd output voltage = 2.5v comp on pgnd in gnd gnd gnd nc gnd lx1 pwin2 v in v in input voltage = 5v fb 1nf 180k ? 56pf 1 2 3 4 12 11 10 9 16 15 14 13 5 6 7 8 2.5 h 2 10 f 1 22 f 1 load 0a to 1.5a 4.7 f 1 10 f 1 10? 0.1 f 1 murata x5r 0805 4.7 f: grm21br61a475ka73l 10 f: grm21br61a106ke19l 22 f: grm21br60j226me39l 2 coiltronics sd14: 2.5 h notes 1. nc = no connect. 2. external components were chosen for a 5% overshoot for a 1a load transient. 85k ? 40k ? fb 06079-051 figure 60. application circuitv in = 5 v, v out = 2.5 v, load = 0 a to 1.5 a
adp2105/adp2106/adp2107 rev. c | page 33 of 36 outline dimensions 16 5 13 8 9 12 1 4 1.95 bsc pin 1 indicator top view 4.00 bsc sq 3.75 bsc sq coplanarity 0.08 exposed pa d (bottom view) compliant to jedec standards mo-220-vggc 12 max 1.00 0.85 0.80 seating plane 0.35 0.30 0.25 0.80 max 0.65 typ 0.05 max 0.02 nom 0.20 ref 0.65 bsc 0.60 max 0.60 max pin 1 indicator 0.50 0.40 0.30 0.25 min 2.50 2.35 sq 2.20 010606-0 the exposed pad on the bottom of the lfcsp package must be soldered to pcb ground for proper heat dissipation and also for noise and mechanical strength benefits. figure 61. 16-lead lead frame chip scale package [lfcsp_vq] 4 mm 4 mm body, very thin quad (cp-16-10) dimensions shown in millimeters ordering guide model output current temperature range output voltage package description package option adp2105acpz-1.2-r7 1 1 a ?40c to +125c 1.2 v 16-lead lfcsp_vq cp-16-10 adp2105acpz-1.5-r7 1 1 a ?40c to +125c 1.5 v 16-lead lfcsp_vq cp-16-10 adp2105acpz-1.8-r7 1 1 a ?40c to +125c 1.8 v 16-lead lfcsp_vq cp-16-10 adp2105acpz-3.3-r7 1 1 a ?40c to +125c 3.3 v 16-lead lfcsp_vq cp-16-10 adp2105acpz-r7 1 1 a ?40c to +125c adj 16-lead lfcsp_vq cp-16-10 adp2106acpz-1.2-r7 1 1.5 a ?40c to +125c 1.2 v 16-lead lfcsp_vq cp-16-10 adp2106acpz-1.5-r7 1 1.5 a ?40c to +125c 1.5 v 16-lead lfcsp_vq cp-16-10 adp2106acpz-1.8-r7 1 1.5 a ?40c to +125c 1.8 v 16-lead lfcsp_vq cp-16-10 adp2106acpz-3.3-r7 1 1.5 a ?40c to +125c 3.3 v 16-lead lfcsp_vq cp-16-10 adp2106acpz-r7 1 1.5 a ?40c to +125c adj 16-lead lfcsp_vq cp-16-10 adp2107acpz-1.2-r7 1 2 a ?40c to +125c 1.2 v 16-lead lfcsp_vq cp-16-10 adp2107acpz-1.5-r7 1 2 a ?40c to +125c 1.5 v 16-lead lfcsp_vq cp-16-10 adp2107acpz-1.8-r7 1 2 a ?40c to +125c 1.8 v 16-lead lfcsp_vq cp-16-10 adp2107acpz-3.3-r7 1 2 a ?40c to +125c 3.3 v 16-lead lfcsp_vq cp-16-10 adp2107acpz-r7 1 2 a ?40c to +125c adj 16-lead lfcsp_vq cp-16-10 adp2105-1.8-evalz 1 1.8 v evaluation board adp2105-evalz 1 adjustable, but set to 2.5 v evaluation board adp2106-1.8-evalz 1 1.8 v evaluation board adp2106-evalz 1 adjustable, but set to 2.5 v evaluation board adp2107-1.8-evalz 1 1.8 v evaluation board adp2107-evalz 1 adjustable, but set to 2.5 v evaluation board 1 z = rohs compliant part.
adp2105/adp2106/adp2107 rev. c | page 34 of 36 notes
adp2105/adp2106/adp2107 rev. c | page 35 of 36 notes
adp2105/adp2106/adp2107 rev. c | page 36 of 36 ?2006C2008 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06079-0-9/08(c) notes


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